1 | /* |
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2 | * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved. |
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3 | * |
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4 | * @APPLE_LICENSE_HEADER_START@ |
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5 | * |
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6 | * The contents of this file constitute Original Code as defined in and |
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7 | * are subject to the Apple Public Source License Version 1.1 (the |
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8 | * "License"). You may not use this file except in compliance with the |
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9 | * License. Please obtain a copy of the License at |
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10 | * http://www.apple.com/publicsource and read it before using this file. |
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11 | * |
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12 | * This Original Code and all software distributed under the License are |
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13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER |
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14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
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15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the |
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17 | * License for the specific language governing rights and limitations |
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18 | * under the License. |
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19 | * |
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20 | * @APPLE_LICENSE_HEADER_END@ |
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21 | */ |
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22 | /* |
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23 | * @OSF_COPYRIGHT@ |
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24 | */ |
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25 | /* |
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26 | * Mach Operating System |
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27 | * Copyright (c) 1991,1990,1989 Carnegie Mellon University |
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28 | * All Rights Reserved. |
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29 | * |
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30 | * Permission to use, copy, modify and distribute this software and its |
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31 | * documentation is hereby granted, provided that both the copyright |
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32 | * notice and this permission notice appear in all copies of the |
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33 | * software, derivative works or modified versions, and any portions |
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34 | * thereof, and that both notices appear in supporting documentation. |
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35 | * |
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36 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" |
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37 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR |
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38 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. |
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39 | * |
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40 | * Carnegie Mellon requests users of this software to return to |
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41 | * |
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42 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU |
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43 | * School of Computer Science |
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44 | * Carnegie Mellon University |
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45 | * Pittsburgh PA 15213-3890 |
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46 | * |
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47 | * any improvements or extensions that they make and grant Carnegie Mellon |
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48 | * the rights to redistribute these changes. |
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49 | */ |
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50 | /* |
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51 | */ |
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52 | /* |
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53 | * File: thread_status.h |
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54 | * Author: Avadis Tevanian, Jr. |
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55 | * Date: 1985 |
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56 | * |
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57 | * This file contains the structure definitions for the thread |
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58 | * state as applied to I386 processors. |
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59 | */ |
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60 | |
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61 | #ifndef _MACH_I386_THREAD_STATUS_H_ |
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62 | #define _MACH_I386_THREAD_STATUS_H_ |
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63 | |
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64 | #include <mach/message.h> |
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65 | #include <mach/i386/fp_reg.h> |
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66 | #include <mach/i386/thread_state.h> |
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67 | #include <i386/eflags.h> |
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68 | |
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69 | |
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70 | |
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71 | /* |
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72 | * the i386_xxxx form is kept for legacy purposes since these types |
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73 | * are externally known... eventually they should be deprecated. |
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74 | * our internal implementation has moved to the following naming convention |
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75 | * |
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76 | * x86_xxxx32 names are used to deal with 32 bit states |
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77 | * x86_xxxx64 names are used to deal with 64 bit states |
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78 | * x86_xxxx names are used to deal with either 32 or 64 bit states |
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79 | * via a self-describing mechanism |
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80 | */ |
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81 | |
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82 | |
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83 | |
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84 | /* |
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85 | * these are the legacy names which should be deprecated in the future |
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86 | * they are externally known which is the only reason we don't just get |
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87 | * rid of them |
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88 | */ |
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89 | #define i386_THREAD_STATE 1 |
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90 | #define i386_FLOAT_STATE 2 |
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91 | #define i386_EXCEPTION_STATE 3 |
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92 | |
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93 | |
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94 | /* |
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95 | * THREAD_STATE_FLAVOR_LIST 0 |
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96 | * these are the supported flavors |
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97 | */ |
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98 | #define x86_THREAD_STATE32 1 |
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99 | #define x86_FLOAT_STATE32 2 |
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100 | #define x86_EXCEPTION_STATE32 3 |
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101 | #define x86_THREAD_STATE64 4 |
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102 | #define x86_FLOAT_STATE64 5 |
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103 | #define x86_EXCEPTION_STATE64 6 |
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104 | #define x86_THREAD_STATE 7 |
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105 | #define x86_FLOAT_STATE 8 |
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106 | #define x86_EXCEPTION_STATE 9 |
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107 | #define x86_DEBUG_STATE32 10 |
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108 | #define x86_DEBUG_STATE64 11 |
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109 | #define x86_DEBUG_STATE 12 |
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110 | #define THREAD_STATE_NONE 13 |
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111 | |
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112 | |
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113 | |
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114 | /* |
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115 | * Largest state on this machine: |
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116 | * (be sure mach/machine/thread_state.h matches!) |
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117 | */ |
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118 | #define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX |
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119 | |
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120 | |
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121 | /* |
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122 | * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed |
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123 | * an exception flavor will return if that is a defined flavor for that |
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124 | * platform. The macro must be manually updated to include all of the valid |
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125 | * exception flavors as defined above. |
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126 | */ |
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127 | #define VALID_THREAD_STATE_FLAVOR(x) \ |
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128 | ((x == x86_THREAD_STATE32) || \ |
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129 | (x == x86_FLOAT_STATE32) || \ |
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130 | (x == x86_EXCEPTION_STATE32) || \ |
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131 | (x == x86_DEBUG_STATE32) || \ |
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132 | (x == x86_THREAD_STATE64) || \ |
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133 | (x == x86_FLOAT_STATE64) || \ |
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134 | (x == x86_EXCEPTION_STATE64) || \ |
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135 | (x == x86_DEBUG_STATE64) || \ |
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136 | (x == x86_THREAD_STATE) || \ |
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137 | (x == x86_FLOAT_STATE) || \ |
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138 | (x == x86_EXCEPTION_STATE) || \ |
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139 | (x == x86_DEBUG_STATE) || \ |
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140 | (x == THREAD_STATE_NONE)) |
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141 | |
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142 | |
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143 | |
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144 | struct x86_state_hdr { |
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145 | int flavor; |
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146 | int count; |
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147 | }; |
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148 | typedef struct x86_state_hdr x86_state_hdr_t; |
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149 | |
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150 | |
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151 | /* |
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152 | * Main thread state consists of |
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153 | * general registers, segment registers, |
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154 | * eip and eflags. |
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155 | */ |
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156 | |
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157 | struct i386_thread_state { |
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158 | unsigned int eax; |
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159 | unsigned int ebx; |
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160 | unsigned int ecx; |
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161 | unsigned int edx; |
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162 | unsigned int edi; |
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163 | unsigned int esi; |
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164 | unsigned int ebp; |
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165 | unsigned int esp; |
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166 | unsigned int ss; |
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167 | unsigned int eflags; |
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168 | unsigned int eip; |
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169 | unsigned int cs; |
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170 | unsigned int ds; |
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171 | unsigned int es; |
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172 | unsigned int fs; |
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173 | unsigned int gs; |
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174 | } ; |
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175 | |
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176 | /* |
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177 | * to be depecrated in the future |
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178 | */ |
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179 | typedef struct i386_thread_state i386_thread_state_t; |
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180 | #define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \ |
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181 | ( sizeof (i386_thread_state_t) / sizeof (int) )) |
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182 | |
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183 | |
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184 | typedef struct i386_thread_state x86_thread_state32_t; |
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185 | #define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \ |
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186 | ( sizeof (x86_thread_state32_t) / sizeof (int) )) |
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187 | |
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188 | |
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189 | |
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190 | |
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191 | struct x86_thread_state64 { |
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192 | uint64_t rax; |
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193 | uint64_t rbx; |
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194 | uint64_t rcx; |
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195 | uint64_t rdx; |
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196 | uint64_t rdi; |
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197 | uint64_t rsi; |
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198 | uint64_t rbp; |
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199 | uint64_t rsp; |
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200 | uint64_t r8; |
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201 | uint64_t r9; |
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202 | uint64_t r10; |
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203 | uint64_t r11; |
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204 | uint64_t r12; |
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205 | uint64_t r13; |
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206 | uint64_t r14; |
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207 | uint64_t r15; |
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208 | uint64_t rip; |
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209 | uint64_t rflags; |
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210 | uint64_t cs; |
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211 | uint64_t fs; |
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212 | uint64_t gs; |
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213 | } ; |
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214 | |
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215 | |
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216 | typedef struct x86_thread_state64 x86_thread_state64_t; |
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217 | #define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \ |
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218 | ( sizeof (x86_thread_state64_t) / sizeof (int) )) |
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219 | |
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220 | |
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221 | |
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222 | |
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223 | struct x86_thread_state { |
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224 | x86_state_hdr_t tsh; |
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225 | union { |
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226 | x86_thread_state32_t ts32; |
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227 | x86_thread_state64_t ts64; |
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228 | } uts; |
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229 | } ; |
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230 | |
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231 | |
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232 | typedef struct x86_thread_state x86_thread_state_t; |
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233 | #define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \ |
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234 | ( sizeof (x86_thread_state_t) / sizeof (int) )) |
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235 | |
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236 | |
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237 | |
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238 | /* |
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239 | * Default segment register values. |
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240 | */ |
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241 | |
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242 | #define USER_CODE_SELECTOR 0x0017 |
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243 | #define USER_DATA_SELECTOR 0x001f |
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244 | #define KERN_CODE_SELECTOR 0x0008 |
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245 | #define KERN_DATA_SELECTOR 0x0010 |
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246 | |
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247 | typedef struct fp_control { |
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248 | unsigned short invalid :1, |
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249 | denorm :1, |
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250 | zdiv :1, |
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251 | ovrfl :1, |
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252 | undfl :1, |
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253 | precis :1, |
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254 | :2, |
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255 | pc :2, |
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256 | #define FP_PREC_24B 0 |
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257 | #define FP_PREC_53B 2 |
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258 | #define FP_PREC_64B 3 |
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259 | rc :2, |
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260 | #define FP_RND_NEAR 0 |
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261 | #define FP_RND_DOWN 1 |
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262 | #define FP_RND_UP 2 |
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263 | #define FP_CHOP 3 |
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264 | /*inf*/ :1, |
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265 | :3; |
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266 | } fp_control_t; |
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267 | /* |
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268 | * Status word. |
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269 | */ |
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270 | |
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271 | typedef struct fp_status { |
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272 | unsigned short invalid :1, |
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273 | denorm :1, |
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274 | zdiv :1, |
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275 | ovrfl :1, |
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276 | undfl :1, |
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277 | precis :1, |
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278 | stkflt :1, |
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279 | errsumm :1, |
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280 | c0 :1, |
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281 | c1 :1, |
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282 | c2 :1, |
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283 | tos :3, |
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284 | c3 :1, |
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285 | busy :1; |
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286 | } fp_status_t; |
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287 | |
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288 | /* defn of 80bit x87 FPU or MMX register */ |
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289 | struct mmst_reg { |
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290 | char mmst_reg[10]; |
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291 | char mmst_rsrv[6]; |
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292 | }; |
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293 | |
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294 | |
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295 | /* defn of 128 bit XMM regs */ |
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296 | struct xmm_reg { |
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297 | char xmm_reg[16]; |
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298 | }; |
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299 | |
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300 | /* |
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301 | * Floating point state. |
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302 | */ |
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303 | |
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304 | #define FP_STATE_BYTES 512 /* number of chars worth of data from fpu_fcw */ |
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305 | |
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306 | /* For legacy reasons we need to leave the hw_state as char bytes */ |
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307 | struct i386_float_state { |
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308 | int fpu_reserved[2]; |
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309 | fp_control_t fpu_fcw; /* x87 FPU control word */ |
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310 | fp_status_t fpu_fsw; /* x87 FPU status word */ |
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311 | uint8_t fpu_ftw; /* x87 FPU tag word */ |
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312 | uint8_t fpu_rsrv1; /* reserved */ |
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313 | uint16_t fpu_fop; /* x87 FPU Opcode */ |
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314 | uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */ |
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315 | uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */ |
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316 | uint16_t fpu_rsrv2; /* reserved */ |
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317 | uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */ |
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318 | uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */ |
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319 | uint16_t fpu_rsrv3; /* reserved */ |
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320 | uint32_t fpu_mxcsr; /* MXCSR Register state */ |
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321 | uint32_t fpu_mxcsrmask; /* MXCSR mask */ |
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322 | struct mmst_reg fpu_stmm0; /* ST0/MM0 */ |
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323 | struct mmst_reg fpu_stmm1; /* ST1/MM1 */ |
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324 | struct mmst_reg fpu_stmm2; /* ST2/MM2 */ |
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325 | struct mmst_reg fpu_stmm3; /* ST3/MM3 */ |
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326 | struct mmst_reg fpu_stmm4; /* ST4/MM4 */ |
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327 | struct mmst_reg fpu_stmm5; /* ST5/MM5 */ |
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328 | struct mmst_reg fpu_stmm6; /* ST6/MM6 */ |
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329 | struct mmst_reg fpu_stmm7; /* ST7/MM7 */ |
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330 | struct xmm_reg fpu_xmm0; /* XMM 0 */ |
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331 | struct xmm_reg fpu_xmm1; /* XMM 1 */ |
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332 | struct xmm_reg fpu_xmm2; /* XMM 2 */ |
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333 | struct xmm_reg fpu_xmm3; /* XMM 3 */ |
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334 | struct xmm_reg fpu_xmm4; /* XMM 4 */ |
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335 | struct xmm_reg fpu_xmm5; /* XMM 5 */ |
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336 | struct xmm_reg fpu_xmm6; /* XMM 6 */ |
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337 | struct xmm_reg fpu_xmm7; /* XMM 7 */ |
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338 | char fpu_rsrv4[14*16]; /* reserved */ |
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339 | int fpu_reserved1; |
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340 | }; |
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341 | |
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342 | |
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343 | /* |
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344 | * to be depecrated in the future |
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345 | */ |
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346 | typedef struct i386_float_state i386_float_state_t; |
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347 | #define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \ |
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348 | (sizeof(i386_float_state_t)/sizeof(unsigned int))) |
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349 | |
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350 | typedef struct i386_float_state x86_float_state32_t; |
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351 | #define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \ |
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352 | (sizeof(x86_float_state32_t)/sizeof(unsigned int))) |
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353 | |
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354 | |
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355 | struct x86_float_state64 { |
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356 | int fpu_reserved[2]; |
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357 | fp_control_t fpu_fcw; /* x87 FPU control word */ |
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358 | fp_status_t fpu_fsw; /* x87 FPU status word */ |
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359 | uint8_t fpu_ftw; /* x87 FPU tag word */ |
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360 | uint8_t fpu_rsrv1; /* reserved */ |
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361 | uint16_t fpu_fop; /* x87 FPU Opcode */ |
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362 | uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */ |
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363 | uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */ |
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364 | uint16_t fpu_rsrv2; /* reserved */ |
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365 | uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */ |
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366 | uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */ |
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367 | uint16_t fpu_rsrv3; /* reserved */ |
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368 | uint32_t fpu_mxcsr; /* MXCSR Register state */ |
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369 | uint32_t fpu_mxcsrmask; /* MXCSR mask */ |
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370 | struct mmst_reg fpu_stmm0; /* ST0/MM0 */ |
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371 | struct mmst_reg fpu_stmm1; /* ST1/MM1 */ |
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372 | struct mmst_reg fpu_stmm2; /* ST2/MM2 */ |
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373 | struct mmst_reg fpu_stmm3; /* ST3/MM3 */ |
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374 | struct mmst_reg fpu_stmm4; /* ST4/MM4 */ |
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375 | struct mmst_reg fpu_stmm5; /* ST5/MM5 */ |
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376 | struct mmst_reg fpu_stmm6; /* ST6/MM6 */ |
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377 | struct mmst_reg fpu_stmm7; /* ST7/MM7 */ |
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378 | struct xmm_reg fpu_xmm0; /* XMM 0 */ |
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379 | struct xmm_reg fpu_xmm1; /* XMM 1 */ |
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380 | struct xmm_reg fpu_xmm2; /* XMM 2 */ |
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381 | struct xmm_reg fpu_xmm3; /* XMM 3 */ |
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382 | struct xmm_reg fpu_xmm4; /* XMM 4 */ |
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383 | struct xmm_reg fpu_xmm5; /* XMM 5 */ |
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384 | struct xmm_reg fpu_xmm6; /* XMM 6 */ |
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385 | struct xmm_reg fpu_xmm7; /* XMM 7 */ |
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386 | struct xmm_reg fpu_xmm8; /* XMM 8 */ |
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387 | struct xmm_reg fpu_xmm9; /* XMM 9 */ |
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388 | struct xmm_reg fpu_xmm10; /* XMM 10 */ |
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389 | struct xmm_reg fpu_xmm11; /* XMM 11 */ |
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390 | struct xmm_reg fpu_xmm12; /* XMM 12 */ |
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391 | struct xmm_reg fpu_xmm13; /* XMM 13 */ |
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392 | struct xmm_reg fpu_xmm14; /* XMM 14 */ |
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393 | struct xmm_reg fpu_xmm15; /* XMM 15 */ |
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394 | char fpu_rsrv4[6*16]; /* reserved */ |
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395 | int fpu_reserved1; |
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396 | }; |
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397 | |
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398 | typedef struct x86_float_state64 x86_float_state64_t; |
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399 | #define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \ |
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400 | (sizeof(x86_float_state64_t)/sizeof(unsigned int))) |
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401 | |
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402 | |
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403 | |
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404 | |
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405 | struct x86_float_state { |
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406 | x86_state_hdr_t fsh; |
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407 | union { |
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408 | x86_float_state32_t fs32; |
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409 | x86_float_state64_t fs64; |
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410 | } ufs; |
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411 | } ; |
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412 | |
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413 | |
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414 | typedef struct x86_float_state x86_float_state_t; |
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415 | #define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \ |
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416 | ( sizeof (x86_float_state_t) / sizeof (int) )) |
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417 | |
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418 | |
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419 | |
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420 | /* |
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421 | * Extra state that may be |
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422 | * useful to exception handlers. |
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423 | */ |
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424 | |
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425 | struct i386_exception_state { |
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426 | unsigned int trapno; |
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427 | unsigned int err; |
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428 | unsigned int faultvaddr; |
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429 | }; |
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430 | |
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431 | /* |
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432 | * to be depecrated in the future |
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433 | */ |
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434 | typedef struct i386_exception_state i386_exception_state_t; |
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435 | #define i386_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \ |
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436 | ( sizeof (i386_exception_state_t) / sizeof (int) )) |
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437 | |
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438 | #define I386_EXCEPTION_STATE_COUNT i386_EXCEPTION_STATE_COUNT |
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439 | |
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440 | typedef struct i386_exception_state x86_exception_state32_t; |
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441 | #define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \ |
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442 | ( sizeof (x86_exception_state32_t) / sizeof (int) )) |
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443 | |
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444 | struct x86_debug_state32 { |
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445 | unsigned int dr0; |
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446 | unsigned int dr1; |
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447 | unsigned int dr2; |
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448 | unsigned int dr3; |
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449 | unsigned int dr4; |
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450 | unsigned int dr5; |
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451 | unsigned int dr6; |
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452 | unsigned int dr7; |
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453 | }; |
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454 | |
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455 | typedef struct x86_debug_state32 x86_debug_state32_t; |
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456 | #define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \ |
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457 | ( sizeof (x86_debug_state32_t) / sizeof (int) )) |
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458 | #define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT |
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459 | |
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460 | |
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461 | struct x86_exception_state64 { |
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462 | unsigned int trapno; |
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463 | unsigned int err; |
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464 | uint64_t faultvaddr; |
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465 | }; |
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466 | |
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467 | typedef struct x86_exception_state64 x86_exception_state64_t; |
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468 | #define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \ |
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469 | ( sizeof (x86_exception_state64_t) / sizeof (int) )) |
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470 | |
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471 | |
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472 | struct x86_debug_state64 { |
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473 | uint64_t dr0; |
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474 | uint64_t dr1; |
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475 | uint64_t dr2; |
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476 | uint64_t dr3; |
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477 | uint64_t dr4; |
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478 | uint64_t dr5; |
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479 | uint64_t dr6; |
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480 | uint64_t dr7; |
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481 | }; |
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482 | |
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483 | |
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484 | typedef struct x86_debug_state64 x86_debug_state64_t; |
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485 | #define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \ |
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486 | ( sizeof (x86_debug_state64_t) / sizeof (int) )) |
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487 | |
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488 | #define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT |
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489 | |
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490 | |
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491 | |
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492 | struct x86_exception_state { |
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493 | x86_state_hdr_t esh; |
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494 | union { |
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495 | x86_exception_state32_t es32; |
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496 | x86_exception_state64_t es64; |
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497 | } ues; |
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498 | } ; |
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499 | |
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500 | |
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501 | typedef struct x86_exception_state x86_exception_state_t; |
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502 | #define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \ |
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503 | ( sizeof (x86_exception_state_t) / sizeof (int) )) |
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504 | |
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505 | struct x86_debug_state { |
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506 | x86_state_hdr_t dsh; |
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507 | union { |
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508 | x86_debug_state32_t ds32; |
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509 | x86_debug_state64_t ds64; |
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510 | } uds; |
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511 | }; |
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512 | |
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513 | |
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514 | |
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515 | typedef struct x86_debug_state x86_debug_state_t; |
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516 | #define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \ |
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517 | (sizeof(x86_debug_state_t)/sizeof(unsigned int))) |
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518 | |
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519 | /* |
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520 | * Machine-independent way for servers and Mach's exception mechanism to |
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521 | * choose the most efficient state flavor for exception RPC's: |
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522 | */ |
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523 | #define MACHINE_THREAD_STATE x86_THREAD_STATE |
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524 | #define MACHINE_THREAD_STATE_COUNT x86_THREAD_STATE_COUNT |
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525 | |
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526 | |
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527 | |
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528 | #endif /* _MACH_I386_THREAD_STATUS_H_ */ |
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