Ticket #32658: Portfile-0.5.0-variants.diff
File Portfile-0.5.0-variants.diff, 9.4 KB (added by cr@…, 13 years ago) |
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cross/openocd
diff -Naur cross/openocd.orig/Portfile cross/openocd/Portfile
old new 4 4 PortSystem 1.0 5 5 6 6 name openocd 7 version 0. 4.07 version 0.5.0 8 8 revision 1 9 9 categories cross devel 10 10 license GPL … … 13 13 long_description The Open On-Chip Debugger (OpenOCD) aims to provide \ 14 14 debugging, in-system programming and boundary-scan \ 15 15 testing for embedded target devices. Built with support \ 16 for FT2232 based devices. 16 for FT2232-based programmers by default. See variants for \ 17 programmer options. 17 18 homepage http://openocd.sourceforge.net/ 18 19 platforms darwin 19 20 20 21 master_sites sourceforge:openocd 21 22 22 checksums rmd160 69ce61cec0aebce1300f44af029bf644194ebce9\23 sha256 fc4b8b55c25920c0024e6e621c4127e92acbe9f6bafaf72b90fd60a5536e919423 checksums rmd160 552f0c498730ee9347ec6d0cda7bf7663357ef8a \ 24 sha256 efb99e0394249cbd518b51b052eea150d5f14557e9a2e0ddfae198792dca51c6 24 25 25 depends_lib port:libftdi 26 27 patchfiles patch-openocd-maskisr-when-stepping-after-breakpoint.diff 28 29 configure.args-append --enable-ft2232_libftdi --disable-werror 26 configure.args-append --disable-werror --enable-maintainer-mode 30 27 31 28 livecheck.url http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd\;a=tags 32 29 livecheck.type regex 33 30 livecheck.regex v(\\d+(\\.\\d+)+)< 31 32 default_variants +ft2232 33 34 variant dummy description {Enable building the dummy port driver} { 35 configure.args-append --enable-dummy 36 } 37 38 variant parport description {Enable building the pc parallel port driver. WARNING: not supported on OS X.} { 39 configure.args-append --enable-parport 40 } 41 42 variant ft2232 conflicts ft2232_ftd2xx description {Enable building support for FT2232 based devices using the libftdi driver, opensource alternate of FTD2XX} { 43 configure.args-append --enable-ft2232_libftdi 44 depends_lib-append port:libftdi 45 } 46 47 variant ft2232_ftd2xx conflicts ft2232 description {Enable building support for FT2232 based devices using the FTD2XX driver from ftdichip.com} { 48 configure.args-append --enable-ft2232_ftd2xx 49 depends_lib-append port:libftd2xx 50 } 51 52 variant usb_blaster conflicts usb_blaster_ftd2xx description {Enable building support for the Altera USB-Blaster using the libftdi driver, opensource alternate of FTD2XX} { 53 configure.args-append --enable-usb_blaster_libftdi 54 depends_lib-append port:libftdi 55 } 56 57 variant usb_blaster_ftd2xx conflicts usb_blaster description {Enable building support for the Altera USB-Blaster using the FTD2XX driver from ftdichip.com} { 58 configure.args-append --enable-usb_blaster_ftd2xx 59 depends_lib-append port:libftd2xx 60 } 61 62 variant amtjtagaccel description {Enable building the Amontec JTAG-Accelerator driver} { 63 configure.args-append --enable-amtjtagaccel 64 } 65 66 variant ecosboard description {Enable building support for eCos based JTAG debugger} { 67 configure.args-append --enable-ecosboard 68 } 69 70 variant zy1000_master requires zy1000 description {Use ZY1000 JTAG master registers} { 71 configure.args-append --enable-zy1000-master 72 } 73 74 variant zy1000 conflicts minidriver_dummy description {Enable ZY1000 interface. WARNING: Using the minidriver disables all other drivers.} { 75 configure.args-append --enable-zy1000 76 } 77 78 variant ioutil description {Enable ioutil functions - useful for standalone OpenOCD implementations} { 79 configure.args-append --enable-ioutil 80 } 81 82 variant ep93xx description {Enable building support for EP93xx based SBCs} { 83 configure.args-append --enable-ep93xx 84 } 85 86 variant at91rm9200 description {Enable building support for AT91RM9200 based SBCs} { 87 configure.args-append --enable-at91rm9200 88 } 89 90 variant gw16012 description {Enable building support for the Gateworks GW16012 JTAG Programmer} { 91 configure.args-append --enable-gw16012 92 } 93 94 variant presto conflicts presto_ftd2xx description {Enable building support for ASIX Presto Programmer using the libftdi driver} { 95 configure.args-append --enable-presto_libftdi 96 depends_lib-append port:libftdi 97 } 98 99 variant presto_ftd2xx conflicts presto description {Enable building support for ASIX Presto Programmer using the FTD2XX driver} { 100 configure.args-append --enable-presto_ftd2xx 101 depends_lib-append port:libftd2xx 102 } 103 104 variant usbprog description {Enable building support for the usbprog JTAG Programmer} { 105 configure.args-append --enable-usbprog 106 } 107 108 variant oocd_trace description {Enable building support for some prototype OpenOCD+trace ETM capture hardware} { 109 configure.args-append --enable-oocd_trace 110 } 111 112 variant jlink description {Enable building support for the Segger J-Link JTAG Programmer} { 113 configure.args-append --enable-jlink 114 } 115 116 variant vsllink description {Enable building support for the Versaloon-Link JTAG Programmer} { 117 configure.args-append --enable-vsllink 118 } 119 120 variant rlink description {Enable building support for the Raisonance RLink JTAG Programmer} { 121 configure.args-append --enable-rlink 122 } 123 124 variant ulink description {Enable building support for the Keil ULINK JTAG Programmer} { 125 configure.args-append --enable-ulink 126 } 127 128 variant arm_jtag_ew --enable-arm-jtag-ew description {Enable building support for the Olimex ARM-JTAG-EW Programmer} { 129 configure.args-append 130 } 131 132 variant buspirate description {Enable building support for the Buspirate} { 133 configure.args-append --enable-buspirate 134 } 135 136 variant minidriver_dummy conflicts zy1000 description {Enable the dummy minidriver} { 137 configure.args-append --enable-minidriver-dummy 138 } 139 -
files/patch-openocd-maskisr-when-stepping-after-breakpoint.diff
diff -Naur cross/openocd.orig/files/patch-openocd-maskisr-when-stepping-after-breakpoint.diff cross/openocd/files/patch-openocd-maskisr-when-stepping-after-breakpoint.diff
old new 1 http://sourceforge.net/apps/trac/openocd/ticket/222 --- src/target/cortex_m3.c So Feb 21 11:17:08 20103 +++ src/target/cortex_m3.c Mo Mai 3 15:27:24 20104 @@ -153,7 +153,7 @@5 return ERROR_OK;6 }7 8 -static int cortex_m3_single_step_core(struct target *target)9 +static int cortex_m3_single_step_core(struct target *target, bool mask_interrupts)10 {11 struct cortex_m3_common *cortex_m3 = target_to_cm3(target);12 struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;13 @@ -162,18 +162,29 @@14 /* backup dhcsr reg */15 dhcsr_save = cortex_m3->dcb_dhcsr;16 17 - /* Mask interrupts before clearing halt, if done already. This avoids18 - * Erratum 377497 (fixed in r1p0) where setting MASKINTS while clearing19 - * HALT can put the core into an unknown state.20 - */21 - if (!(cortex_m3->dcb_dhcsr & C_MASKINTS))22 + if(mask_interrupts) {23 + /* Mask interrupts before clearing halt, if not done already. This avoids24 + * Erratum 377497 (fixed in r1p0) where setting MASKINTS while clearing25 + * HALT can put the core into an unknown state.26 + */27 + if (!(cortex_m3->dcb_dhcsr & C_MASKINTS))28 + mem_ap_write_atomic_u32(swjdp, DCB_DHCSR,29 + DBGKEY | C_MASKINTS | C_HALT | C_DEBUGEN);30 mem_ap_write_atomic_u32(swjdp, DCB_DHCSR,31 - DBGKEY | C_MASKINTS | C_HALT | C_DEBUGEN);32 - mem_ap_write_atomic_u32(swjdp, DCB_DHCSR,33 - DBGKEY | C_MASKINTS | C_STEP | C_DEBUGEN);34 + DBGKEY | C_MASKINTS | C_STEP | C_DEBUGEN);35 + }36 + else {37 + mem_ap_write_atomic_u32(swjdp, DCB_DHCSR,38 + DBGKEY | C_STEP | C_DEBUGEN);39 + }40 LOG_DEBUG(" ");41 42 - /* restore dhcsr reg */43 + /* restore dhcsr reg44 + *45 + * FIXME Why restore cortex_m3->dcb_dhcsr? It isn't changed by above write46 + * operations. Don't we introduce an inconsistency between cortex_m3->dcb_dhcsr47 + * and the acutal register contents?48 + */49 cortex_m3->dcb_dhcsr = dhcsr_save;50 cortex_m3_clear_halt(target);51 52 @@ -677,7 +688,7 @@53 breakpoint->address,54 breakpoint->unique_id);55 cortex_m3_unset_breakpoint(target, breakpoint);56 - cortex_m3_single_step_core(target);57 + cortex_m3_single_step_core(target, 1); // Mask interrupts during step58 cortex_m3_set_breakpoint(target, breakpoint);59 }60 }61 @@ -716,6 +727,7 @@62 struct breakpoint *breakpoint = NULL;63 struct reg *pc = armv7m->core_cache->reg_list + 15;64 bool bkpt_inst_found = false;65 + bool on_bkpt;66 67 if (target->state != TARGET_HALTED)68 {69 @@ -723,6 +735,9 @@70 return ERROR_TARGET_NOT_HALTED;71 }72 73 + // We've stopped on a breakpoint74 + on_bkpt = (target->debug_reason == DBG_REASON_BREAKPOINT);75 +76 /* current = 1: continue on current pc, otherwise continue at <address> */77 if (!current)78 buf_set_u32(pc->value, 0, 32, address);79 @@ -748,8 +763,10 @@80 * instruction - as such simulate a step */81 if (bkpt_inst_found == false)82 {83 - /* set step and clear halt */84 - cortex_m3_write_debug_halt_mask(target, C_STEP, C_HALT);85 + /* Disable interrupts diring step if we stopped on a break point.86 + * Otherwise any pending interrupt will get served next and we will87 + * return to the same break point after the interrupt completes. */88 + cortex_m3_single_step_core(target, on_bkpt);89 }90 91 mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);